CopperCAD's AVer ChipBalance Program Menu
AVer ChipBalance

AVer ChipBalance can locate chip (SMD) device
connection imbalances that may cause thermal
imbalances during the IR reflow soldering
process, which can lead to Tomb-Stone defects.

• User defined limits, either by percentage of
   the connection width or by an absolute value.

• Visit each device using the report viewer window.

• Verify and locate copper connection imbalances

• Avoid soldering problems before they occur.

         Cline Connection Imbalance          Via Connection Imbalance          Shape Connection Imbalance
     Cline Chip Imbalance      Via Chip Imbalance      Shape Chip Imbalance

       Chip Balance Report Window
     Chip Balance Report

Questions concerning CopperCAD's SKILL Software for Cadence Allegro,
please contact our CopperCAD-Ware group.

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