Silicon packaging pin counts and densities have increased to
the point that in most designs the layer count is totally dominated by
the number of layers to break out the largest BGA. When grounds, power
and cross connect layers are included layer counts of up to twenty or
more often are required. This high aspect ratio will result in lower
manufacturing yields and higher board costs.
A Patented Process called Channel Routing, which uses low cost (HDI) micro via technology, creates more channels within the BGA for interconnects. This will result in fewer routing layers. Channel Routing software, developed by CopperCAD Design Inc for the Cadence toolset, has been created to automate the process. The software will break out the BGA, create channels and route the signals to the BGA edge. It can complete in hours what it takes days to do manually.
The Designer is able to specify track size and spacing; channel type; differential pairs; power and ground pin sharing; bus grouping and specific signal routing by layer. The use of the Channel Routing process also creates space on the opposite side of the board for more passives to be placed. The software is quick, easy to use and will pay for itself on your first design with its saving in productivity and board costs.