Program Name |
Program Summary Description |
AAdd_AttachFile |
Attaches ASCII text files to the allegro BRD file. |
AAdd_Balance |
Adds Copper Balance or "Thieving" pads to layers. |
AAdd_ChannelBGA |
Creates Nortel Patented routing channels on BGA's. |
AAdd_FanOut |
Creates and attaches Fanouts to pins and devices. |
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AAdd_GangOpening |
Interactively adds Soldermask Gang openings to QFP's. |
AAdd_KeepOut |
Adds route and via keepouts to devices and pins. |
AAdd_RadialGrid |
Creates a circular component placement grid. |
AAdd_SymbolMarker |
Finds and adds silkscreen polarity markers to symbols. |
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AAdd_TearDrop |
Adds teardrops (Fillets) to cline via and pad entries. |
ACopy_ShapeParam |
Copies Dynamic shape parameters from one shape to another. |
ACopy_TestProbe |
Copies Testpoints from one BRD file to another. |
ADel Antenna |
Finds and deletes copper Stubs and Antennas in the X,Y and Z axis. |
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AGen_Assembly |
Creates readable Assembly Drawing layers. |
AGen_BackDrill |
Creates BackDrill drill files for high speed nets. |
AGen_NetLength |
Reports net length or net nodes for selected nets. |
AGen_TentPlugVia |
Creates tenting or plugging layers as specified. |
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AGen_userid |
Creates user ID reports, configures env & ilinit files. |
AMod_BrdOutline |
Converts shapes and polygons, creates soldermask outline. |
AMod_BrdTidy |
Cleans up duplicate and dangling vias, clines and shapes. |
AMod_ClineWidth |
Changes the cline width of all clines on target layer. |
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AMod_ClineNeck |
Changes the cline width at targeted vias and pins. |
AMod_FlipSide |
Flips placed components and routing to the opposite side of the board. |
AMod_Net |
Add, change or merge new net names onto clines and pins. |
AMod_RRectPad |
Creates and modifies device pads with rounded corners. |
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AMod_PlaceBoundShape |
Alters PlaceBound Shape to the match component outline. |
AMod_Taper |
Creates Tapered clines for COB (Chip On Board) routing. |
AMod_Text |
WordPad Style "Find and Replace" text for Allegro. |
AQue_ClineBends |
Reports and displays 90 degree cline bends and cline jogs.   |
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AQue_Height |
Reports and changes symbol minimum and maximun heights values.  |
AQue_Symbol |
Displays placed components by filtered list. |
AQue_TestProbe |
Displays nets with, or without TestProbes, filtered by properties. |
AVer_AcidTrap |
Finds potential Acid Traps between clines, pins and pads. |
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AVer_ChipBalance |
Finds copper connection imbalances on two pin SMD chip components. |
AVer_SymbolLibrary |
Board Symbol Data to Library comparison tool. |
AVerify |
DFA / DFM board checking tool. |